1. Field of the Invention
The present invention relates to a capacitor of a semiconductor device and a method of manufacturing the same. More particularly, the present invention relates to a capacitor of a semiconductor device, which reduces contact resistance and increases oxidation resistivity of a storage node thereof, and a method of manufacturing the same.
2. Description of the Related Art
With the development of portable information and communication apparatuses, there is an increase in demand for nonvolatile memories in which stored data is not removed even if power is off. A representative electronic device satisfying this demand is a ferroelectric RAM (FRAM) device. The FRAM device is advantageous in that information is written at high speed, power consumption is small, and stored data does not volatilize.
A ferroelectric capacitor including a ferroelectric thin film and an upper electrode and a lower electrode on both sides, respectively, of the ferroelectric thin film is an essential device of the FRAM device. Such a ferroelectric capacitor is sometimes formed above a transistor provided in the FRAM device in order to increase integrity. In this case, usually a polysilicon plug is used to connect the ferroelectric capacitor to the transistor.
FIGS. 1 through 5 illustrate sectional view for explaining stages in a conventional method of manufacturing a ferroelectric capacitor.
Referring to FIG. 1, a gate 4 and a bit line 6 are formed to be separated from each other by a predetermined, sufficient distance on a substrate 2. An interlayer insulation layer 8 is formed on the substrate 2 such that the gate 4 and the bit line 6 are covered by the interlayer insulation layer 8. A contact hole 10 is formed between the gate 4 and the bit line 6 to expose a portion of the substrate 2. The contact hole 10 is filled with a silicon plug 12.
Referring to FIG. 2, a cobalt (Co) film 14 is formed on the top of the interlayer insulation layer 8 and the polysilicon plug 12. Here, a Co-silicide layer 16 is formed at the contact portion between the polysilicon plug 12 and the Co film 14. The Co-silicide layer 16 is used as an oxidation preventing layer. The oxidation preventing layer prevents the polysilicon plug 12 from being oxidized during subsequent heat treatment of a ferroelectric layer at a high temperature of 600–800 ° C.
As shown in FIG. 3, the Co film 14 is removed from the interlayer insulation layer 8. Thereafter, as shown in FIG. 4, a titanium (Ti) film 18 is formed on the interlayer insulation layer 8 so that the interlayer insulation layer 8 and the Co-silicide layer 16 on the silicon plug 12 are covered by the Ti film 18. The Ti film 18 is used as a bonding film. The Ti film 18 enhances the adhesive power between the interlayer insulation layer 8 having a ceramic characteristic and a lower electrode.
Referring to FIG. 5, a lower electrode 20, a ferroelectric layer 22, and an upper electrode 24 are sequentially formed on the surface of the Ti film 18, thereby forming a ferroelectric capacitor. The ferroelectric layer 22 is usually heat-treated at a high temperature to improve a thin film characteristic. During the heat treatment, the Ti film 18 may be oxidized, which results in a bad contact in which the polysilicon plug 12 becomes electrically isolated from the lower electrode 20.